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Drawing on their experience with chips from AMD and systems, interconnects, and software from Cray Inc., the authors explore the problems that create bottlenecks in attaining good performance. They cover techniques that pertain to each of the three levels of parallelism:
- Message passing between the nodes
- Shared memory parallelism on the nodes or the multiple instruction, multiple data (MIMD) units on the accelerator
- Vectorization on the inner level
After discussing architectural and software challenges, the book outlines a strategy for porting and optimizing an existing application to a large massively parallel processor (MPP) system. With a look toward the future, it also introduces the use of general purpose graphics processing units (GPGPUs) for carrying out HPC computations. A companion website at [...] contains all the examples from the book, along with updated timing results on the latest released processors.
Drawing on their experience with chips from AMD and systems, interconnects, and software from Cray Inc., the authors explore the problems that create bottlenecks in attaining good performance. They cover techniques that pertain to each of the three levels of parallelism:
- Message passing between the nodes
- Shared memory parallelism on the nodes or the multiple instruction, multiple data (MIMD) units on the accelerator
- Vectorization on the inner level
After discussing architectural and software challenges, the book outlines a strategy for porting and optimizing an existing application to a large massively parallel processor (MPP) system. With a look toward the future, it also introduces the use of general purpose graphics processing units (GPGPUs) for carrying out HPC computations. A companion website at [...] contains all the examples from the book, along with updated timing results on the latest released processors.
For the past 40 years, Mr. Levesque has optimized scientific application programs for successful HPC systems. He is an expert in application tuning and compiler analysis of scientific applications.
Gene Wagenbreth is a senior system programmer in the Information Sciences Institute at the University of Southern California, where he is applying GPGPU technology in sparse matrix solvers, image tomography, and real-time computational fluid dynamics. He also presents courses on the use and programming of GPUs.
Since the 1970s, Mr. Wagenbreth has worked with most of the highest performance computers, including Cray models, other vector processors, hypercubes, and clusters. He has worked with shared and distributed memory computers using MPI, OpenMP, pthreads, and other techniques. He has also applied parallel processing in numerous fields, including seismic analysis, reservoir simulation, weather forecasting, and battlefield simulations.
| Erscheinungsjahr: | 2018 |
|---|---|
| Fachbereich: | EDV |
| Genre: | Informatik |
| Rubrik: | Naturwissenschaften & Technik |
| Medium: | Taschenbuch |
| Inhalt: | Einband - flex.(Paperback) |
| ISBN-13: | 9781138372689 |
| ISBN-10: | 1138372684 |
| Sprache: | Englisch |
| Einband: | Kartoniert / Broschiert |
| Autor: |
Levesque, John
Wagenbreth, Gene |
| Hersteller: |
Taylor & Francis
Chapman and Hall/CRC |
| Verantwortliche Person für die EU: | preigu GmbH & Co. KG, Lengericher Landstr. 19, D-49078 Osnabrück, mail@preigu.de |
| Abbildungen: | 66 SW-Abb., 28 Tabellen |
| Maße: | 13 x 156 x 234 mm |
| Von/Mit: | John Levesque (u. a.) |
| Erscheinungsdatum: | 10.09.2018 |
| Gewicht: | 0,379 kg |